An integrated circuit may have a latch circuit for capturing the signal level of a signal line within the integrated circuit. For example, in a memory the latch may capture the signal on a bitline for reading a data value from a memory cell. To ensure correct circuit operation, following a transition of the signal level on the signal line it is important that the latch captures the new signal level before the signal level changes for a following cycle. This constrains the operating frequency and operating voltage with which the integrated circuit can operate, and so can limit performance or energy efficiency.
A signal assist circuit may be provided to help with pulling the signal up or down to a logical high signal level or logical low signal level respectively. This helps speed up transitions of the signal level on the signal line, to allow operating frequency to be increased or operating voltage to be decreased. The present technique seeks to provide an improved signal assist circuit for the integrated circuit.